General Info PART 2 - AD9467 - FMC -250EBZ

The AD9467 uses standard Serial Port Interfacing (SPI)

SPI is a synchronous data bus meaning that it uses separate lines for data and a "clock" that keeps both sides in perfect sync. The "clock," as we familiarized ourselves with using the Maxim 11205 ADC, is an oscillating signal that tells the receiver exactly when to sample the bits on the data line. Sometimes the receiver will sample the bits from the data line when the clock goes from HI to LO or when it goes from LO to HI.

Looking at the datasheet for the AD9467, I found that the board comes equipped with three Serial Port Pins: SCLK, SDIO, and CSB.

The falling edge of the CSB, along with the rising edge of the SCLK, determines the start of the framing sequence. During an instruction phase, a 16-bit instruction is transmitted followed by one or more data bytes, which is determined by Bit Field W0 and Bit Field W1. Here is an example of a timing diagram for the board:

As you can see in the diagram, when the CSB line is brought low, the device processes SDIO and SCLK instructions. After the 16-bit instruction set, the CSB goes high, thus ending communication with the other two pins. 

Data can be sent in either MSB (most significant bit) or LSB (least significant) mode. In MSB first mode, the data is transmitted starting with the 16th bit in descending order towards the 1st bit. The opposite is true for LSB first mode. 

Here is a good link regarding interfacing high speed ADCs via SPI:

http://www.analog.com/media/en/technical-documentation/application-notes/56755538964965031881813AN_877.pdf

Additional Notes from Joe:

At a high level, RS232 is single ended and uses a wide voltage swing (the standard actually calls for +/-12V). This has a problem of being pretty high power and being very limited in terms of speed of transmission.  RS232 is susceptible to noise and differences in the sending and receiving ground voltages, so the longer the distance between the source and destination, the more likely it is that there is an error.

LVDS is a current drive system (instead of Voltage drive) which means that it does not care about any differences in the ground potential at the source vs. the destination.  Also, since it is differential, noise will be 'picked up' on both lines at the same time and will be cancelled out.  Finally, LVDS is very high speed compared to RS232 mainly due to the many advantages I already listed.

http://www.eetimes.com/document.asp?doc_id=1272339