Today we went through Tutorial 1 and 2 from the Zynq Book Tutorials.
Steps for Tutorial 1:
1. Create new project
2. Select ZedBoard Zynq Evaluation and Development Kit from the Boards tab
3. Create block design
4. Add IP (ZYNQ7 Processing System)
5. Run Block Automation
6. Add IP (AXI GPIO)
7. Run Connection Automation
8. Save block design
9. Validate design
10. Create HDL Wrapper (from sources tab)
11. Generate bitstream
12. Export Hardware (include bitstream)
13. Launch SDK (change workspace)
14. Open new application project
15. Expand project and import src
16. Click General > File System
17. Browse to find directory
18. Xilinx Tools > Program FPGA
19. Under Project Explorer right click to run-as project
20. Launch on Hardware
No comments:
Post a Comment